makefile

【Beginner’s Guide】Introduction to Makefile - Qiita

■ What is $(SRCS:%.c=%.o)? By using %, it replaces the .c files specified in SRCS with .o files.

■ What is $@specifiedingcc?ItisoneoftheautomaticvariablesthatcanbeusedinMakefile.$@ refers to the target file name.

In the command gcc -g -o hello hellomake.c hello.c:

• -g enables debug output.
• -o changes the output file from “c” to “linked file”.
  • In fact, you can use -o to change the conversion as specified, whether it’s “c”, “i”, or “o”.

You can assign abstract names to targets using a target name like %.o:

• You can retrieve the target name using $@.
• You can retrieve the first dependency using $<.

wildcard patsubst

If you specify a file that doesn’t exist as a dependency, does it call a make target with the same name?

• http://www.jsk.t.u-tokyo.ac.jp/~k-okada/makefile/
  • It’s easy to understand. (blu3mo)

Make uses the “last modified” timestamp of each file to figure out if a target needs to be rebuilt. Make will rebuild a target if it doesn’t exist, or if it was last modified earlier than one of its dependencies.

• This is important. (blu3mo)(blu3mo)
• You can update this with touch.